* ============================================================================= * LM3886 Non-Inverting Power Amplifier — ngspice / LTspice-compatible netlist * ============================================================================= * Topology: Class AB, gain = 21 (≈26 dB), 8 Ω midrange driver load * * Official TI LM3886 SPICE model (preferred for accuracy): * Download from TI: https://www.ti.com/product/LM3886 * Product folder → Design & development → Simulation models * Or search: "LM3886 PSpice Model" on ti.com * Place LM3886.LIB / LM3886.MOD next to this file and uncomment the .include * line below. Until then, a behavioral macromodel approximating the IC is used. * * VERIFY AGAINST DATASHEET before ordering PCBs: * https://www.ti.com/lit/ds/symlink/lm3886.pdf * Mute pin threshold, SOA, thermal pad, and pinout must match your package. * ============================================================================= * .include LM3886.LIB ; <-- uncomment when TI model is present .param Rin=1k Cin=1u Rf=20k Cf=20p Ri=1k Ci=250u .param Vsupply=25 .param Rload=8 * ----- Signal source (AC + transient sine) ----------------------------------- * Vac for .ac sweep; Vsin for .tran. Switch via XACTRAN param if needed. Vin IN 0 DC 0 AC 1 SIN(0 0.707 1k) ; 0.707 Vpk ≈ 0.5 Vrms → ~10.5 Vpk out * ----- Input coupling & bias ------------------------------------------------- * Cin: AC-couples source, blocks DC offset into the non-inverting input Cin IN N_IN {Cin} ; 1 µF film — low distortion coupling * Rin: sets HF corner with Cin (fc ≈ 1/(2π·Rin·Cin) ≈ 159 Hz with 1k… but * wait: Rin is series; bias Rbias sets DC path. Series Rin = 1k as specified. Rin N_IN N_PLUS {Rin} ; 1 kΩ series input resistance * Input bias resistor: DC path for non-inverting input bias current → GND Rbias N_PLUS 0 1Meg ; 1 MΩ — keep DC offset low; VERIFY datasheet Ib * ----- Feedback network (non-inverting gain = 1 + Rf/Ri = 21) ----------------- * Rf / Ri set closed-loop gain; Cf rolls off ultrasonic gain for stability Rf OUT N_MINUS {Rf} ; 20 kΩ feedback resistor Cf OUT N_MINUS {Cf} ; 20 pF — compensates stray C, aids stability * Ri AC-coupled so DC gain = 1 (minimizes output DC offset from Vos) Ri N_MINUS N_GAIN {Ri} ; 1 kΩ gain-setting resistor Ci N_GAIN 0 {Ci} ; 250 µF electrolytic — AC ground for Ri * WHY Ci: at audio freqs ≈ short; at DC open → gain=1 * ----- Behavioral LM3886 macromodel (replace with TI .subckt when available) -- * Ideal VCVS with supply clamps, finite GBW roll-off, and mute switch. * This is NOT a substitute for the official model for THD/SOA studies — * use TI's model before trusting distortion numbers. * * Pin map (TO-220 style LM3886T, VERIFY datasheet for your exact package): * +IN, −IN, OUT, V+, V−, MUTE * * Open-loop gain ~100 dB, dominant pole ~10 Hz → GBW ≈ 8 MHz class behavior Eamp N_ERR 0 N_PLUS N_MINUS 1e5 Rpole N_ERR N_AMP 1k Cpole N_AMP 0 15.9u ; fp ≈ 10 Hz with 1k → Aol roll-off * Supply-limited output buffer (simple clamp via diodes + series Rout) Ebuf N_RAW 0 N_AMP 0 1 Rout N_RAW N_PREOUT 0.05 ; output stage bulk resistance DclipP N_PREOUT VCC DCLAMP DclipN VEE N_PREOUT DCLAMP .model DCLAMP D(Is=1e-12 N=0.01 Rs=0.01) * Mute: when MUTE node is low, output is forced near 0 via series switch * RC delay from VEE (typical LM3886 mute referenced to V−) — VERIFY datasheet * Here: RC from +rail to mute pin through 100k + 10µF to GND ≈ 1 s delay Rmute VCC N_MUTE 100k ; 100 kΩ — charges Cmute after power-up Cmute N_MUTE 0 10u ; 10 µF — τ ≈ R·C = 1 s turn-on delay * Soft mute: series resistance decreases as mute voltage rises * Approximation: voltage-controlled resistor via switch (ngspice) Sout N_PREOUT OUT N_MUTE 0 SWMUTE .model SWMUTE SW(Vt=0.5 Vh=0.1 Ron=0.01 Roff=10Meg) * ----- Zobel (Boucherot) network — resistive HF load for inductive speakers --- * WHY: speaker impedance rises with frequency; Zobel keeps amp seeing ≈Rload Rz OUT N_ZOBEL 10 ; 10 Ω Cz N_ZOBEL 0 0.1u ; 0.1 µF film — with 10Ω ≈ 8Ω @ HF * ----- Output inductor (Thiele network) — isolates capacitive cable loads ----- * WHY: prevents oscillation with long speaker cables / capacitive loads Lout OUT N_SPK 0.7u ; 0.7 µH air-core or ferrite-core inductor RLpar OUT N_SPK 10 ; 10 Ω parallel — damps inductor Q * ----- Load (8 Ω midrange driver) -------------------------------------------- Rload N_SPK 0 {Rload} * ----- Supply rails ±25 V with decoupling ------------------------------------ VCC VCC 0 {Vsupply} VEE VEE 0 {-Vsupply} * Ceramic HF bypass — place within mm of IC pins on real PCB CdecP_cer VCC 0 100n CdecN_cer VEE 0 100n * Bulk electrolytic — reservoir for bass current peaks CdecP_el VCC 0 1000u CdecN_el VEE 0 1000u * ----- Analyses -------------------------------------------------------------- * AC: frequency response 10 Hz – 100 kHz (magnitude & phase at speaker node) .ac dec 100 10 100k * Transient: 1 kHz sine, enough cycles to settle mute (~1 s) then measure * For fast THD check without waiting for mute, start mute charged: * .ic V(N_MUTE)=5 .ic V(N_MUTE)=5 .tran 1u 10m 0 1u * Fourier / THD estimate on speaker voltage after settle .four 1k V(N_SPK) * Print helpers .print ac Mag(V(N_SPK)) Phase(V(N_SPK)) .print tran V(N_SPK) V(IN) V(N_MUTE) .end