# TPA3255 Class-D Power Amplifier (Alternative)

Analog-input **Class-D** alternative to the LM3886 Class-AB stages. Suitable when you want higher efficiency / more power per channel from a single **PVDD = 24–36 V** supply.

> **Important:** The TPA3255 is a high pin-count power IC. This folder provides a **design-rules README**, a **KiCad schematic skeleton** (output LC filter, PVDD decoupling, analog input filter), and a **BOM** for those blocks.  
> **Before finalizing a PCB, cross-reference TI’s official TPA3255 EVM schematic and layout** ([TPA3255 product page](https://www.ti.com/product/TPA3255) → Tools & software → TPA3255EVM). A verified reference is safer than a hand-drawn full pinout for this device.

**VERIFY** all pin numbers, bootstrap caps, RESET/FAULT wiring, and thermal pad rules against the [TPA3255 datasheet](https://www.ti.com/lit/ds/symlink/tpa3255.pdf) and EVM User Guide before ordering boards.

## Key design rules

### 1. PVDD / PGND decoupling (multiple pins)

- Every PVDD pin group needs **local ceramic** (e.g. 10× 100 nF–1 µF X7R) **plus bulk electrolytics** (e.g. 470–2200 µF low-ESR) close to the IC.
- Treat **PGND** as a low-inductance plane; do not star-route high-current returns through thin traces.
- Place ceramics within a few millimeters of the pins; vias straight down to the ground plane.

### 2. Output LC filter

Per half-bridge / channel (BTL uses two):

| Part | Value | Role |
|------|-------|------|
| L | **15 µH** Class-D rated | Differential / single-ended filter inductor |
| C | **680 nF** film | Filter capacitor to GND or differentially across load |

- Place L/C **as close to the IC output pins as practical**, then route to the speaker connector.
- Use inductors specified for **Class-D / high-frequency switching** (low core loss, adequate Isat) — e.g. Coilcraft or Würth Elektronik (see BOM).
- Keep switch-node copper area reasonable (EMI vs. capacitance tradeoff).

### 3. Analog input filter

- RC (or differential) anti-alias / EMI filter before IN_X pins.
- Keep analog ground separate from noisy PGND until a single joining point (follow EVM).

### 4. PCB stack-up

- **4-layer board strongly recommended:** signal / GND plane / PVDD plane / signal (or follow EVM stack-up).
- Continuous unbroken ground under the IC and LC filters.

### 5. Thermal pad via array

- Fill the PowerPAD™ / thermal pad with a **via array** to internal GND / heatsink layers per datasheet.
- Do not leave the thermal pad unconnected; solder coverage matters for θJA.

### 6. Other

- Bootstrap capacitors per half-bridge (value/type per datasheet).
- RESET sequencing and FAULT monitoring as in the EVM.
- Snubbers only if EVM / measurements show need — do not invent values blindly.

## Files

| Path | Description |
|------|-------------|
| [`kicad/tpa3255_skeleton.kicad_sch`](kicad/tpa3255_skeleton.kicad_sch) | Sub-circuits: LC out, PVDD decouple, analog in |
| [`docs/BOM.csv`](docs/BOM.csv) | Filter + decoupling MPN suggestions |
| [`spice/output_lc_filter.cir`](spice/output_lc_filter.cir) | Ideal LC filter frequency response check |

## Merge workflow

1. Download TPA3255EVM schematic PDF / design files from TI.  
2. Import or redraw the IC symbol with **verified pinout**.  
3. Attach this repo’s LC filter, PVDD network, and input filter blocks to the correct nets.  
4. Copy EVM layout practices for PVDD, boot caps, and thermal vias.  
5. Re-run EMI and thermal checks before a production spin.