(kicad_sch
  (version 20231120)
  (generator "eeschema")
  (generator_version "8.0")
  (uuid "e5f6a7b8-c9d0-1234-efab-345678901234")
  (paper "A3")
  (title_block
    (title "TPA3255 Skeleton — LC Filter / PVDD Decoupling / Analog Input")
    (date "2026-08-28")
    (rev "1.0")
    (company "DIY Active Speaker Project")
    (comment 1 "Merge with TI TPA3255EVM pinout — do NOT treat this as a complete amp schematic")
    (comment 2 "VERIFY every connection against TPA3255 datasheet + EVM before PCB")
  )

  (lib_symbols
    (symbol "Device:R"
      (pin_names (offset 0))
      (exclude_from_sim no) (in_bom yes) (on_board yes)
      (property "Reference" "R" (at 2.032 0 90) (effects (font (size 1.27 1.27))))
      (property "Value" "R" (at 0 0 90) (effects (font (size 1.27 1.27))))
      (symbol "R_0_1"
        (rectangle (start -1.016 -2.54) (end 1.016 2.54)
          (stroke (width 0.254) (type default)) (fill (type none))))
      (symbol "R_1_1"
        (pin passive line (at 0 3.81 270) (length 1.27)
          (name "~" (effects (font (size 1.27 1.27))))
          (number "1" (effects (font (size 1.27 1.27)))))
        (pin passive line (at 0 -3.81 90) (length 1.27)
          (name "~" (effects (font (size 1.27 1.27))))
          (number "2" (effects (font (size 1.27 1.27)))))
      )
    )
    (symbol "Device:C"
      (pin_names (offset 0.254))
      (exclude_from_sim no) (in_bom yes) (on_board yes)
      (property "Reference" "C" (at 0.635 2.54 0) (effects (font (size 1.27 1.27))))
      (property "Value" "C" (at 0.635 -2.54 0) (effects (font (size 1.27 1.27))))
      (symbol "C_0_1"
        (polyline (pts (xy -2.032 -0.762) (xy 2.032 -0.762))
          (stroke (width 0.508) (type default)) (fill (type none)))
        (polyline (pts (xy -2.032 0.762) (xy 2.032 0.762))
          (stroke (width 0.508) (type default)) (fill (type none))))
      (symbol "C_1_1"
        (pin passive line (at 0 3.81 270) (length 2.794)
          (name "~" (effects (font (size 1.27 1.27))))
          (number "1" (effects (font (size 1.27 1.27)))))
        (pin passive line (at 0 -3.81 90) (length 2.794)
          (name "~" (effects (font (size 1.27 1.27))))
          (number "2" (effects (font (size 1.27 1.27)))))
      )
    )
    (symbol "Device:L"
      (pin_names (offset 1.016))
      (exclude_from_sim no) (in_bom yes) (on_board yes)
      (property "Reference" "L" (at -1.27 0 90) (effects (font (size 1.27 1.27))))
      (property "Value" "L" (at 1.905 0 90) (effects (font (size 1.27 1.27))))
      (symbol "L_0_1"
        (arc (start 0 2.54) (mid 0.5528 1.27) (end 0 0)
          (stroke (width 0) (type default)) (fill (type none)))
        (arc (start 0 0) (mid 0.5528 -1.27) (end 0 -2.54)
          (stroke (width 0) (type default)) (fill (type none))))
      (symbol "L_1_1"
        (pin passive line (at 0 3.81 270) (length 1.27)
          (name "~" (effects (font (size 1.27 1.27))))
          (number "1" (effects (font (size 1.27 1.27)))))
        (pin passive line (at 0 -3.81 90) (length 1.27)
          (name "~" (effects (font (size 1.27 1.27))))
          (number "2" (effects (font (size 1.27 1.27)))))
      )
    )
    (symbol "power:GND"
      (power)
      (exclude_from_sim no) (in_bom yes) (on_board yes)
      (property "Reference" "#PWR" (at 0 -6.35 0) (effects (font (size 1.27 1.27)) hide))
      (property "Value" "GND" (at 0 -3.81 0) (effects (font (size 1.27 1.27))))
      (symbol "GND_0_1"
        (polyline (pts (xy 0 0) (xy 0 -1.27) (xy 1.27 -1.27) (xy 0 -2.54) (xy -1.27 -1.27) (xy 0 -1.27))
          (stroke (width 0) (type default)) (fill (type none))))
      (symbol "GND_1_1"
        (pin power_in line (at 0 0 270) (length 0) hide
          (name "~" (effects (font (size 1.27 1.27))))
          (number "1" (effects (font (size 1.27 1.27)))))
      )
    )
    (symbol "power:PVDD"
      (power)
      (exclude_from_sim no) (in_bom yes) (on_board yes)
      (property "Reference" "#PWR" (at 0 -3.81 0) (effects (font (size 1.27 1.27)) hide))
      (property "Value" "PVDD" (at 0 3.556 0) (effects (font (size 1.27 1.27))))
      (symbol "PVDD_0_1"
        (polyline (pts (xy -0.762 1.27) (xy 0 2.54) (xy 0.762 1.27))
          (stroke (width 0) (type default)) (fill (type none)))
        (polyline (pts (xy 0 0) (xy 0 2.54))
          (stroke (width 0) (type default)) (fill (type none))))
      (symbol "PVDD_1_1"
        (pin power_in line (at 0 0 90) (length 0) hide
          (name "~" (effects (font (size 1.27 1.27))))
          (number "1" (effects (font (size 1.27 1.27)))))
      )
    )
  )

  (text "=== BLOCK A: Output LC filter (one half-bridge shown; duplicate for BTL / other channels) ==="
    (exclude_from_sim no) (at 20.32 25.4 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "ta"))
  (text "WHY 15uH + 680nF: attenuates Class-D switching carrier before speaker; place next to IC outs"
    (exclude_from_sim no) (at 20.32 27.94 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "ta2"))

  (label "OUT_SW_A" (at 25.4 40.64 0)
    (effects (font (size 1.27 1.27)) (justify right bottom)) (uuid "l_sw"))
  (label "SPK_A" (at 88.9 40.64 0)
    (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid "l_spk"))

  (symbol (lib_id "Device:L") (at 45.72 40.64 90) (unit 1)
    (uuid "la")
    (property "Reference" "L_OUT_A" (at 45.72 35.56 90) (effects (font (size 1.27 1.27))))
    (property "Value" "15uH" (at 45.72 45.72 90) (effects (font (size 1.27 1.27))))
    (property "Footprint" "Inductor_SMD:L_Coilcraft_SER2915" (at 45.72 40.64 0)
      (effects (font (size 1.27 1.27)) hide))
    (pin "1" (uuid "la1")) (pin "2" (uuid "la2")))
  (symbol (lib_id "Device:C") (at 71.12 50.8 0) (unit 1)
    (uuid "ca")
    (property "Reference" "C_OUT_A" (at 76.2 49.53 0) (effects (font (size 1.27 1.27))))
    (property "Value" "680nF" (at 76.2 52.07 0) (effects (font (size 1.27 1.27))))
    (property "Footprint" "Capacitor_THT:C_Rect_L13.0mm_W5.0mm_P10.00mm" (at 71.12 50.8 0)
      (effects (font (size 1.27 1.27)) hide))
    (pin "1" (uuid "ca1")) (pin "2" (uuid "ca2")))
  (symbol (lib_id "power:GND") (at 71.12 54.61 0) (unit 1)
    (uuid "ga")
    (property "Reference" "#PWR40" (at 71.12 54.61 0) (effects (font (size 1.27 1.27)) hide))
    (property "Value" "GND" (at 71.12 58.42 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "ga1")))

  (wire (pts (xy 25.4 40.64) (xy 41.91 40.64)) (stroke (width 0) (type default)) (uuid "wa1"))
  (wire (pts (xy 49.53 40.64) (xy 71.12 40.64)) (stroke (width 0) (type default)) (uuid "wa2"))
  (wire (pts (xy 71.12 40.64) (xy 71.12 46.99)) (stroke (width 0) (type default)) (uuid "wa3"))
  (wire (pts (xy 71.12 40.64) (xy 88.9 40.64)) (stroke (width 0) (type default)) (uuid "wa4"))

  (text "=== BLOCK B: PVDD decoupling network (repeat at EVERY PVDD pin group per EVM) ==="
    (exclude_from_sim no) (at 20.32 70.0 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "tb"))
  (text "WHY many ceramics: Class-D di/dt demands ultra-low ESL bypass; bulk stores bass energy"
    (exclude_from_sim no) (at 20.32 72.54 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "tb2"))

  (symbol (lib_id "power:PVDD") (at 38.1 80.0 0) (unit 1)
    (uuid "pv")
    (property "Reference" "#PWR41" (at 38.1 80.0 0) (effects (font (size 1.27 1.27)) hide))
    (property "Value" "PVDD" (at 38.1 76.2 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "pv1")))
  (symbol (lib_id "Device:C") (at 50.8 90.0 0) (unit 1)
    (uuid "c100n1")
    (property "Reference" "C_PVDD_100n_1" (at 58.0 88.73 0) (effects (font (size 1.27 1.27))))
    (property "Value" "100nF" (at 58.0 91.27 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "c100n1a")) (pin "2" (uuid "c100n1b")))
  (symbol (lib_id "Device:C") (at 63.5 90.0 0) (unit 1)
    (uuid "c1u")
    (property "Reference" "C_PVDD_1u" (at 70.0 88.73 0) (effects (font (size 1.27 1.27))))
    (property "Value" "1uF" (at 70.0 91.27 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "c1ua")) (pin "2" (uuid "c1ub")))
  (symbol (lib_id "Device:C") (at 76.2 90.0 0) (unit 1)
    (uuid "c470u")
    (property "Reference" "C_PVDD_BULK" (at 84.0 88.73 0) (effects (font (size 1.27 1.27))))
    (property "Value" "1000uF" (at 84.0 91.27 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "c470ua")) (pin "2" (uuid "c470ub")))
  (symbol (lib_id "power:GND") (at 50.8 93.81 0) (unit 1)
    (uuid "gb1")
    (property "Reference" "#PWR42" (at 50.8 93.81 0) (effects (font (size 1.27 1.27)) hide))
    (property "Value" "GND" (at 50.8 97.62 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "gb1p")))
  (symbol (lib_id "power:GND") (at 63.5 93.81 0) (unit 1)
    (uuid "gb2")
    (property "Reference" "#PWR43" (at 63.5 93.81 0) (effects (font (size 1.27 1.27)) hide))
    (property "Value" "GND" (at 63.5 97.62 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "gb2p")))
  (symbol (lib_id "power:GND") (at 76.2 93.81 0) (unit 1)
    (uuid "gb3")
    (property "Reference" "#PWR44" (at 76.2 93.81 0) (effects (font (size 1.27 1.27)) hide))
    (property "Value" "GND" (at 76.2 97.62 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "gb3p")))

  (wire (pts (xy 38.1 80.0) (xy 38.1 86.19)) (stroke (width 0) (type default)) (uuid "wb0"))
  (wire (pts (xy 38.1 86.19) (xy 50.8 86.19)) (stroke (width 0) (type default)) (uuid "wb1"))
  (wire (pts (xy 50.8 86.19) (xy 63.5 86.19)) (stroke (width 0) (type default)) (uuid "wb2"))
  (wire (pts (xy 63.5 86.19) (xy 76.2 86.19)) (stroke (width 0) (type default)) (uuid "wb3"))

  (text "=== BLOCK C: Analog input RC filter (single-ended example; use diff pair if EVM is differential) ==="
    (exclude_from_sim no) (at 20.32 110.0 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "tc"))
  (text "WHY Rin+Cin: RF/EMI roll-off before modulator; values — start from EVM then tune"
    (exclude_from_sim no) (at 20.32 112.54 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "tc2"))

  (label "LINE_IN" (at 25.4 125.0 0)
    (effects (font (size 1.27 1.27)) (justify right bottom)) (uuid "l_lin"))
  (label "IN_A_TO_IC" (at 88.9 125.0 0)
    (effects (font (size 1.27 1.27)) (justify left bottom)) (uuid "l_ina"))

  (symbol (lib_id "Device:R") (at 45.72 125.0 90) (unit 1)
    (uuid "rin")
    (property "Reference" "R_IN_A" (at 45.72 119.92 90) (effects (font (size 1.27 1.27))))
    (property "Value" "100R" (at 45.72 130.08 90) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "rina")) (pin "2" (uuid "rinb")))
  (symbol (lib_id "Device:C") (at 71.12 135.0 0) (unit 1)
    (uuid "cin")
    (property "Reference" "C_IN_A" (at 76.2 133.73 0) (effects (font (size 1.27 1.27))))
    (property "Value" "2.2nF" (at 76.2 136.27 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "cina")) (pin "2" (uuid "cinb")))
  (symbol (lib_id "power:GND") (at 71.12 138.81 0) (unit 1)
    (uuid "gc")
    (property "Reference" "#PWR45" (at 71.12 138.81 0) (effects (font (size 1.27 1.27)) hide))
    (property "Value" "GND" (at 71.12 142.62 0) (effects (font (size 1.27 1.27))))
    (pin "1" (uuid "gcp")))

  (wire (pts (xy 25.4 125.0) (xy 41.91 125.0)) (stroke (width 0) (type default)) (uuid "wc1"))
  (wire (pts (xy 49.53 125.0) (xy 71.12 125.0)) (stroke (width 0) (type default)) (uuid "wc2"))
  (wire (pts (xy 71.12 125.0) (xy 71.12 131.19)) (stroke (width 0) (type default)) (uuid "wc3"))
  (wire (pts (xy 71.12 125.0) (xy 88.9 125.0)) (stroke (width 0) (type default)) (uuid "wc4"))

  (text "IC PLACEHOLDER: Import TPA3255 symbol from TI EVM / Ultra Librarian — connect OUT_SW_*, PVDD, IN_*"
    (exclude_from_sim no) (at 20.32 155.0 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "tic"))
  (text "THERMAL: Via array under PowerPAD to GND planes — see datasheet land pattern. 4-layer PCB recommended."
    (exclude_from_sim no) (at 20.32 157.54 0)
    (effects (font (size 1.27 1.27)) (justify left bottom))
    (uuid "tth"))

  (sheet_instances (path "/" (page "1")))
)